.file "test_jtable_const.c"
.intel_syntax noprefix
.section .rdata,"dr"
LC1:
.ascii "Four\0"
.text
.p2align 2,,3
.def _print4; .scl 3; .type 32; .endef
_print4:
LFB11:
.cfi_startproc
sub esp, 28
.cfi_def_cfa_offset 32
mov DWORD PTR [esp], OFFSET FLAT:LC1
call _printf
add esp, 28
.cfi_def_cfa_offset 4
ret
.cfi_endproc
LFE11:
.section .rdata,"dr"
LC2:
.ascii "Three\0"
.text
.p2align 2,,3
.def _print3; .scl 3; .type 32; .endef
_print3:
LFB10:
.cfi_startproc
sub esp, 28
.cfi_def_cfa_offset 32
mov DWORD PTR [esp], OFFSET FLAT:LC2
call _printf
add esp, 28
.cfi_def_cfa_offset 4
ret
.cfi_endproc
LFE10:
.section .rdata,"dr"
LC3:
.ascii "Two\0"
.text
.p2align 2,,3
.def _print2; .scl 3; .type 32; .endef
_print2:
LFB9:
.cfi_startproc
sub esp, 28
.cfi_def_cfa_offset 32
mov DWORD PTR [esp], OFFSET FLAT:LC3
call _printf
add esp, 28
.cfi_def_cfa_offset 4
ret
.cfi_endproc
LFE9:
.section .rdata,"dr"
LC4:
.ascii "One\0"
.text
.p2align 2,,3
.def _print1; .scl 3; .type 32; .endef
_print1:
LFB8:
.cfi_startproc
sub esp, 28
.cfi_def_cfa_offset 32
mov DWORD PTR [esp], OFFSET FLAT:LC4
call _printf
add esp, 28
.cfi_def_cfa_offset 4
ret
.cfi_endproc
LFE8:
.section .rdata,"dr"
LC5:
.ascii "Zero\0"
.text
.p2align 2,,3
.def _print0; .scl 3; .type 32; .endef
_print0:
LFB7:
.cfi_startproc
sub esp, 28
.cfi_def_cfa_offset 32
mov DWORD PTR [esp], OFFSET FLAT:LC5
call _printf
add esp, 28
.cfi_def_cfa_offset 4
ret
.cfi_endproc
LFE7:
.def ___main; .scl 2; .type 32; .endef
.section .rdata,"dr"
LC6:
.ascii "%u\0"
.data
.align 4
LC0:
.long _print0
.long _print1
.long _print2
.long _print3
.long _print4
.section .text.startup,"x"
.p2align 2,,3
.globl _main
.def _main; .scl 2; .type 32; .endef
_main:
LFB12:
.cfi_startproc
push ebp
.cfi_def_cfa_offset 8
.cfi_offset 5, -8
mov ebp, esp
.cfi_def_cfa_register 5
push edi
push esi
and esp, -16
sub esp, 48
.cfi_offset 6, -16
.cfi_offset 7, -12
call ___main
lea eax, [esp+44]
mov DWORD PTR [esp+4], eax
mov DWORD PTR [esp], OFFSET FLAT:LC6
call _scanf
lea edi, [esp+24]
mov esi, OFFSET FLAT:LC0
mov ecx, 5
rep movsd
mov eax, DWORD PTR [esp+44]
call [DWORD PTR [esp+24+eax*4]]
xor eax, eax
lea esp, [ebp-8]
pop esi
.cfi_restore 6
pop edi
.cfi_restore 7
pop ebp
.cfi_def_cfa 4, 4
.cfi_restore 5
ret
.cfi_endproc
LFE12:
.def _printf; .scl 2; .type 32; .endef
.def _scanf; .scl 2; .type 32; .endef
CS5maWxlCSJ0ZXN0X2p0YWJsZV9jb25zdC5jIgoJLmludGVsX3N5bnRheCBub3ByZWZpeAoJLnNlY3Rpb24gLnJkYXRhLCJkciIKTEMxOgoJLmFzY2lpICJGb3VyXDAiCgkudGV4dAoJLnAyYWxpZ24gMiwsMwoJLmRlZglfcHJpbnQ0Owkuc2NsCTM7CS50eXBlCTMyOwkuZW5kZWYKX3ByaW50NDoKTEZCMTE6CgkuY2ZpX3N0YXJ0cHJvYwoJc3ViCWVzcCwgMjgKCS5jZmlfZGVmX2NmYV9vZmZzZXQgMzIKCW1vdglEV09SRCBQVFIgW2VzcF0sIE9GRlNFVCBGTEFUOkxDMQoJY2FsbAlfcHJpbnRmCglhZGQJZXNwLCAyOAoJLmNmaV9kZWZfY2ZhX29mZnNldCA0CglyZXQKCS5jZmlfZW5kcHJvYwpMRkUxMToKCS5zZWN0aW9uIC5yZGF0YSwiZHIiCkxDMjoKCS5hc2NpaSAiVGhyZWVcMCIKCS50ZXh0CgkucDJhbGlnbiAyLCwzCgkuZGVmCV9wcmludDM7CS5zY2wJMzsJLnR5cGUJMzI7CS5lbmRlZgpfcHJpbnQzOgpMRkIxMDoKCS5jZmlfc3RhcnRwcm9jCglzdWIJZXNwLCAyOAoJLmNmaV9kZWZfY2ZhX29mZnNldCAzMgoJbW92CURXT1JEIFBUUiBbZXNwXSwgT0ZGU0VUIEZMQVQ6TEMyCgljYWxsCV9wcmludGYKCWFkZAllc3AsIDI4CgkuY2ZpX2RlZl9jZmFfb2Zmc2V0IDQKCXJldAoJLmNmaV9lbmRwcm9jCkxGRTEwOgoJLnNlY3Rpb24gLnJkYXRhLCJkciIKTEMzOgoJLmFzY2lpICJUd29cMCIKCS50ZXh0CgkucDJhbGlnbiAyLCwzCgkuZGVmCV9wcmludDI7CS5zY2wJMzsJLnR5cGUJMzI7CS5lbmRlZgpfcHJpbnQyOgpMRkI5OgoJLmNmaV9zdGFydHByb2MKCXN1Ygllc3AsIDI4CgkuY2ZpX2RlZl9jZmFfb2Zmc2V0IDMyCgltb3YJRFdPUkQgUFRSIFtlc3BdLCBPRkZTRVQgRkxBVDpMQzMKCWNhbGwJX3ByaW50ZgoJYWRkCWVzcCwgMjgKCS5jZmlfZGVmX2NmYV9vZmZzZXQgNAoJcmV0CgkuY2ZpX2VuZHByb2MKTEZFOToKCS5zZWN0aW9uIC5yZGF0YSwiZHIiCkxDNDoKCS5hc2NpaSAiT25lXDAiCgkudGV4dAoJLnAyYWxpZ24gMiwsMwoJLmRlZglfcHJpbnQxOwkuc2NsCTM7CS50eXBlCTMyOwkuZW5kZWYKX3ByaW50MToKTEZCODoKCS5jZmlfc3RhcnRwcm9jCglzdWIJZXNwLCAyOAoJLmNmaV9kZWZfY2ZhX29mZnNldCAzMgoJbW92CURXT1JEIFBUUiBbZXNwXSwgT0ZGU0VUIEZMQVQ6TEM0CgljYWxsCV9wcmludGYKCWFkZAllc3AsIDI4CgkuY2ZpX2RlZl9jZmFfb2Zmc2V0IDQKCXJldAoJLmNmaV9lbmRwcm9jCkxGRTg6Cgkuc2VjdGlvbiAucmRhdGEsImRyIgpMQzU6CgkuYXNjaWkgIlplcm9cMCIKCS50ZXh0CgkucDJhbGlnbiAyLCwzCgkuZGVmCV9wcmludDA7CS5zY2wJMzsJLnR5cGUJMzI7CS5lbmRlZgpfcHJpbnQwOgpMRkI3OgoJLmNmaV9zdGFydHByb2MKCXN1Ygllc3AsIDI4CgkuY2ZpX2RlZl9jZmFfb2Zmc2V0IDMyCgltb3YJRFdPUkQgUFRSIFtlc3BdLCBPRkZTRVQgRkxBVDpMQzUKCWNhbGwJX3ByaW50ZgoJYWRkCWVzcCwgMjgKCS5jZmlfZGVmX2NmYV9vZmZzZXQgNAoJcmV0CgkuY2ZpX2VuZHByb2MKTEZFNzoKCS5kZWYJX19fbWFpbjsJLnNjbAkyOwkudHlwZQkzMjsJLmVuZGVmCgkuc2VjdGlvbiAucmRhdGEsImRyIgpMQzY6CgkuYXNjaWkgIiV1XDAiCgkuZGF0YQoJLmFsaWduIDQKTEMwOgoJLmxvbmcJX3ByaW50MAoJLmxvbmcJX3ByaW50MQoJLmxvbmcJX3ByaW50MgoJLmxvbmcJX3ByaW50MwoJLmxvbmcJX3ByaW50NAoJLnNlY3Rpb24JLnRleHQuc3RhcnR1cCwieCIKCS5wMmFsaWduIDIsLDMKCS5nbG9ibAlfbWFpbgoJLmRlZglfbWFpbjsJLnNjbAkyOwkudHlwZQkzMjsJLmVuZGVmCl9tYWluOgpMRkIxMjoKCS5jZmlfc3RhcnRwcm9jCglwdXNoCWVicAoJLmNmaV9kZWZfY2ZhX29mZnNldCA4CgkuY2ZpX29mZnNldCA1LCAtOAoJbW92CWVicCwgZXNwCgkuY2ZpX2RlZl9jZmFfcmVnaXN0ZXIgNQoJcHVzaAllZGkKCXB1c2gJZXNpCglhbmQJZXNwLCAtMTYKCXN1Ygllc3AsIDQ4CgkuY2ZpX29mZnNldCA2LCAtMTYKCS5jZmlfb2Zmc2V0IDcsIC0xMgoJY2FsbAlfX19tYWluCglsZWEJZWF4LCBbZXNwKzQ0XQoJbW92CURXT1JEIFBUUiBbZXNwKzRdLCBlYXgKCW1vdglEV09SRCBQVFIgW2VzcF0sIE9GRlNFVCBGTEFUOkxDNgoJY2FsbAlfc2NhbmYKCWxlYQllZGksIFtlc3ArMjRdCgltb3YJZXNpLCBPRkZTRVQgRkxBVDpMQzAKCW1vdgllY3gsIDUKCXJlcCBtb3ZzZAoJbW92CWVheCwgRFdPUkQgUFRSIFtlc3ArNDRdCgljYWxsCVtEV09SRCBQVFIgW2VzcCsyNCtlYXgqNF1dCgl4b3IJZWF4LCBlYXgKCWxlYQllc3AsIFtlYnAtOF0KCXBvcAllc2kKCS5jZmlfcmVzdG9yZSA2Cglwb3AJZWRpCgkuY2ZpX3Jlc3RvcmUgNwoJcG9wCWVicAoJLmNmaV9kZWZfY2ZhIDQsIDQKCS5jZmlfcmVzdG9yZSA1CglyZXQKCS5jZmlfZW5kcHJvYwpMRkUxMjoKCS5kZWYJX3ByaW50ZjsJLnNjbAkyOwkudHlwZQkzMjsJLmVuZGVmCgkuZGVmCV9zY2FuZjsJLnNjbAkyOwkudHlwZQkzMjsJLmVuZGVm