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  1.  
  2. #define DIVIDE_ITER_0_7(i) \
  3. "    lsl %D[n]\n" \
  4. "    rol __tmp_reg__\n" \
  5. "    cp __tmp_reg__,%A[d]\n" \
  6. "    cpc __zero_reg__,%B[d]\n" \
  7. "    cpc __zero_reg__,%C[d]\n" \
  8. "    cpc __zero_reg__,%D[d]\n" \
  9. "    brcs zero_bit_" #i "__%=\n" \
  10. "    sub __tmp_reg__,%A[d]\n" \
  11. "    ori %D[q],1<<(7-" #i ")\n" \
  12. "zero_bit_" #i "__%=:\n"
  13.  
  14. #define DIVIDE_ITER_8_15(i) \
  15. "    lsl %C[n]\n" \
  16. "    rol __tmp_reg__\n" \
  17. "    rol %D[n]\n" \
  18. "    cp __tmp_reg__,%A[d]\n" \
  19. "    cpc %D[n],%B[d]\n" \
  20. "    cpc __zero_reg__,%C[d]\n" \
  21. "    cpc __zero_reg__,%D[d]\n" \
  22. "    brcs zero_bit_" #i "__%=\n" \
  23. "    sub __tmp_reg__,%A[d]\n" \
  24. "    sbc %D[n],%B[d]\n" \
  25. "    ori %C[q],1<<(15-" #i ")\n" \
  26. "zero_bit_" #i "__%=:\n"
  27.  
  28. #define DIVIDE_ITER_16_23(i) \
  29. "    lsl %B[n]\n" \
  30. "    rol __tmp_reg__\n" \
  31. "    rol %D[n]\n" \
  32. "    rol %C[n]\n" \
  33. "    cp __tmp_reg__,%A[d]\n" \
  34. "    cpc %D[n],%B[d]\n" \
  35. "    cpc %C[n],%C[d]\n" \
  36. "    cpc __zero_reg__,%D[d]\n" \
  37. "    brcs zero_bit_" #i "__%=\n" \
  38. "    sub __tmp_reg__,%A[d]\n" \
  39. "    sbc %D[n],%B[d]\n" \
  40. "    sbc %C[n],%C[d]\n" \
  41. "    ori %B[q],1<<(23-" #i ")\n" \
  42. "zero_bit_" #i "__%=:\n"
  43.  
  44. #define DIVIDE_ITER_24_30(i) \
  45. "    lsl %A[n]\n" \
  46. "    rol __tmp_reg__\n" \
  47. "    rol %D[n]\n" \
  48. "    rol %C[n]\n" \
  49. "    rol %B[n]\n" \
  50. "    cp __tmp_reg__,%A[d]\n" \
  51. "    cpc %D[n],%B[d]\n" \
  52. "    cpc %C[n],%C[d]\n" \
  53. "    cpc %B[n],%D[d]\n" \
  54. "    brcs zero_bit_" #i "__%=\n" \
  55. "    sub __tmp_reg__,%A[d]\n" \
  56. "    sbc %D[n],%B[d]\n" \
  57. "    sbc %C[n],%C[d]\n" \
  58. "    sbc %B[n],%D[d]\n" \
  59. "    ori %A[q],1<<(31-" #i ")\n" \
  60. "zero_bit_" #i "__%=:\n"
  61.  
  62. static uint32_t call (uint32_t n, uint32_t d)
  63. {
  64.     AMBRO_ASSERT(d != 0)
  65.  
  66.     uint32_t q = 0;
  67.  
  68.     asm(
  69.         "clr __tmp_reg__\n"
  70.         DIVIDE_ITER_0_7(0)
  71.         DIVIDE_ITER_0_7(1)
  72.         DIVIDE_ITER_0_7(2)
  73.         DIVIDE_ITER_0_7(3)
  74.         DIVIDE_ITER_0_7(4)
  75.         DIVIDE_ITER_0_7(5)
  76.         DIVIDE_ITER_0_7(6)
  77.         DIVIDE_ITER_0_7(7)
  78.         DIVIDE_ITER_8_15(8)
  79.         DIVIDE_ITER_8_15(9)
  80.         DIVIDE_ITER_8_15(10)
  81.         DIVIDE_ITER_8_15(11)
  82.         DIVIDE_ITER_8_15(12)
  83.         DIVIDE_ITER_8_15(13)
  84.         DIVIDE_ITER_8_15(14)
  85.         DIVIDE_ITER_8_15(15)
  86.         DIVIDE_ITER_16_23(16)
  87.         DIVIDE_ITER_16_23(17)
  88.         DIVIDE_ITER_16_23(18)
  89.         DIVIDE_ITER_16_23(19)
  90.         DIVIDE_ITER_16_23(20)
  91.         DIVIDE_ITER_16_23(21)
  92.         DIVIDE_ITER_16_23(22)
  93.         DIVIDE_ITER_16_23(23)
  94.         DIVIDE_ITER_24_30(24)
  95.         DIVIDE_ITER_24_30(25)
  96.         DIVIDE_ITER_24_30(26)
  97.         DIVIDE_ITER_24_30(27)
  98.         DIVIDE_ITER_24_30(28)
  99.         DIVIDE_ITER_24_30(29)
  100.         DIVIDE_ITER_24_30(30)
  101.         "    lsl %A[n]\n"
  102.         "    rol __tmp_reg__\n"
  103.         "    rol %D[n]\n"
  104.         "    rol %C[n]\n"
  105.         "    rol %B[n]\n"
  106.         "    cp __tmp_reg__,%A[d]\n"
  107.         "    cpc %D[n],%B[d]\n"
  108.         "    cpc %C[n],%C[d]\n"
  109.         "    cpc %B[n],%D[d]\n"
  110.         "    brcs end_zero_bit_%=\n"
  111.         "    inc %A[q]\n"
  112.         "end_zero_bit_%=:\n"
  113.  
  114.         : [q] "=&a" (q),
  115.           [n] "=&r" (n)
  116.         : "[q]" (q),
  117.           "[n]" (n),
  118.           [d] "r" (d)
  119.     );
  120.  
  121.     return q;
  122. }
Not running #stdin #stdout 0s 0KB
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https://ideone.com/Ytyc5N
language:
C++ (gcc 8.3)
created:
10 years ago
visibility:
public

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